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DATE
2010
IEEE
171views Hardware» more  DATE 2010»
14 years 1 months ago
Digital statistical analysis using VHDL
—Variations of process parameters have an important impact on reliability and yield in deep sub micron IC technologies. One methodology to estimate the influence of these effects...
Manfred Dietrich, Uwe Eichler, Joachim Haase
ICCAD
2006
IEEE
113views Hardware» more  ICCAD 2006»
14 years 5 months ago
A new statistical max operation for propagating skewness in statistical timing analysis
Statistical static timing analysis (SSTA) is emerging as a solution for predicting the timing characteristics of digital circuits under process variability. For computing the stat...
Kaviraj Chopra, Bo Zhai, David Blaauw, Dennis Sylv...
ASPDAC
2006
ACM
130views Hardware» more  ASPDAC 2006»
14 years 2 months ago
Convergence-provable statistical timing analysis with level-sensitive latches and feedback loops
Statistical timing analysis has been widely applied to predict the timing yield of VLSI circuits when process variations become significant. Existing statistical latch timing met...
Lizheng Zhang, Jeng-Liang Tsai, Weijen Chen, Yuhen...
ICCAD
2009
IEEE
106views Hardware» more  ICCAD 2009»
13 years 6 months ago
Quantifying robustness metrics in parameterized static timing analysis
Process and environmental variations continue to present significant challenges to designers of high-performance integrated circuits. In the past few years, while much research has...
Khaled R. Heloue, Chandramouli V. Kashyap, Farid N...
ICCAD
2003
IEEE
140views Hardware» more  ICCAD 2003»
14 years 5 months ago
Block-based Static Timing Analysis with Uncertainty
Static timing analysis is a critical step in design of any digital integrated circuit. Technology and design trends have led to significant increase in environmental and process v...
Anirudh Devgan, Chandramouli V. Kashyap