120 search results - page 13 / 24 » Timing-driven placement for FPGAs |
GLVLSI
2007
IEEE
14 years 2 months ago
2007
IEEE
We present new timing and congestion driven FPGA placement algorithms with minimal runtime overhead. By predicting the post-routing critical edges and estimating congestion accura...
VLSID
2005
IEEE
14 years 8 months ago
2005
IEEE
An important application of dynamically and partially reconfigurable computing platforms is in dynamic task allocation and execution. On-line synthesis, on-line placement and on-l...
FPL
2006
Springer
13 years 11 months ago
2006
Springer
Both custom IC and FPGA designs in the nanometer regime suffer from process variations. But different from custom ICs, FPGAs' programmability offers a unique design freedom t...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
Since performance on FPGAs is dominated by the routing architecture rather than wirelength, we propose a new architecture-aware approach to initial FPGA placement that models the ...
FPL
2005
Springer
14 years 1 months ago
2005
Springer
This paper addresses exploitation of the capabilities of platform FPGAs to implement embedded networking for systems on chip. In particular, a methodology for exploring trade-offs...