Sciweavers

55 search results - page 6 / 11
» Tolerating Radiation-Induced Transient Faults in Modern Proc...
Sort
View
DAC
2005
ACM
14 years 8 months ago
Improving java virtual machine reliability for memory-constrained embedded systems
Dual-execution/checkpointing based transient error tolerance techniques have been widely used in the high-end mission critical systems. These techniques, however, are not very att...
Guangyu Chen, Mahmut T. Kandemir
ISCA
2003
IEEE
136views Hardware» more  ISCA 2003»
14 years 23 days ago
Transient-Fault Recovery for Chip Multiprocessors
To address the increasing susceptibility of commodity chip multiprocessors (CMPs) to transient faults, we propose Chiplevel Redundantly Threaded multiprocessor with Recovery (CRTR...
Mohamed A. Gomaa, Chad Scarbrough, Irith Pomeranz,...
BCS
2008
13 years 9 months ago
Hardware Dependability in the Presence of Soft Errors
Using formal verification for designing hardware designs free from logic design bugs has been an active area of research since the last 15 years. Technology has matured and we hav...
Ashish Darbari, Bashir M. Al-Hashimi
EDCC
2008
Springer
13 years 9 months ago
A Transient-Resilient System-on-a-Chip Architecture with Support for On-Chip and Off-Chip TMR
The ongoing technological advances in the semiconductor industry make Multi-Processor System-on-a-Chips (MPSoCs) more attractive, because uniprocessor solutions do not scale satis...
Roman Obermaisser, Hubert Kraut, Christian El Sall...
CGO
2005
IEEE
14 years 1 months ago
SWIFT: Software Implemented Fault Tolerance
To improve performance and reduce power, processor designers employ advances that shrink feature sizes, lower voltage levels, reduce noise margins, and increase clock rates. Howev...
George A. Reis, Jonathan Chang, Neil Vachharajani,...