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» Topological Design of Interconnected LAN-MAN Networks
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IPPS
1998
IEEE
13 years 11 months ago
Measuring the Vulnerability of Interconnection Networks in Embedded Systems
Studies of the fault-tolerance of graphs have tended to largely concentrate on classical graph connectivity. This measure is very basic, and conveys very little information for des...
Vijay Lakamraju, Zahava Koren, Israel Koren, C. Ma...
ICDCS
2005
IEEE
14 years 1 months ago
FraNtiC: A Fractal Geometric Framework for Mesh-Based Wireless Access Networks
The design of the access networks of next generation broadband wireless systems requires special attention in the light of changing network characteristics. In this paper, we pres...
Samik Ghosh, Kalyan Basu, Sajal K. Das
ICPPW
2002
IEEE
14 years 15 days ago
A Programming Methodology for Designing Block Recursive Algorithms on Various Computer Networks
In this paper, we use the tensor product notation as the framework of a programming methodology for designing block recursive algorithms on various computer networks. In our previ...
Min-Hsuan Fan, Chua-Huang Huang, Yeh-Ching Chung
ASPDAC
2009
ACM
108views Hardware» more  ASPDAC 2009»
14 years 2 months ago
Synthesis of networks on chips for 3D systems on chips
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (N...
Srinivasan Murali, Ciprian Seiculescu, Luca Benini...
DATE
2007
IEEE
133views Hardware» more  DATE 2007»
14 years 1 months ago
Butterfly and benes-based on-chip communication networks for multiprocessor turbo decoding
Several research activities have recently emerged aiming to propose multiprocessor implementations in order to achieve flexible and high throughput parallel iterative decoding. Be...
Hazem Moussa, Olivier Muller, Amer Baghdadi, Miche...