115 search results - page 15 / 23 » Topological Design of Interconnected LAN-MAN Networks |
JSS
2006
13 years 7 months ago
2006
In this work, we propose a visual, custom-designed, event-driven interconnect simulation framework to evaluate the performance of off-chip multi-processor/memory communications ar...
NOCS
2009
IEEE
14 years 2 months ago
2009
IEEE
Design Constraints imposed by global interconnect delays as well as limitations in integration of disparate technologies make 3-D chip stacks an enticing technology solution for m...
INTEGRATION
2008
13 years 7 months ago
2008
With the growing complexity in consumer embedded products, new tendencies forecast heterogeneous Multi-Processor SystemsOn-Chip (MPSoCs) consisting of complex integrated component...
SIGCOMM
2004
ACM
14 years 1 months ago
2004
ACM
Overlay network monitoring enables distributed Internet applications to detect and recover from path outages and periods of degraded performance within seconds. For an overlay net...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
Current Systems-On-Chip (SoC) execute applications that demand extensive parallel processing. Networks-OnChip (NoC) provide a structured way of realizing interconnections on silic...