In this paper, we present a method for generating checker circuits from sequential-extended regular expressions (SEREs). Such sequences form the core of increasingly-used Assertion...
Abstract. As semiconductor technology strides towards billions of transistors on a single die, problems concerned with deep sub-micron process features and design productivity call...
Josep Carmona, Jordi Cortadella, Victor Khomenko, ...
—In this paper we propose a virtualization layer to handle the program execution on reconfigurable computers in order to address one of their biggest problems which is the manage...
Abstract. The motivation for this work is to support a natural separation of concerns during formal system development. In a developmentby-refinement context, we would like to be a...
Abstract. In this paper we propose three small instances of a reconfigurable circuit and analyze their properties using the brute force method and evolutionary algorithm. Although ...