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CASES
2005
ACM
13 years 9 months ago
Software-directed power-aware interconnection networks
Interconnection networks have been deployed as the communication fabric in a wide range of parallel computer systems. With recent technological trends allowing growing quantities ...
Vassos Soteriou, Noel Eisley, Li-Shiuan Peh
DAC
2003
ACM
14 years 19 days ago
Instruction set compiled simulation: a technique for fast and flexible instruction set simulation
Instruction set simulators are critical tools for the exploration and validation of new programmable architectures. Due to increasing complexity of the architectures and timeto-ma...
Mehrdad Reshadi, Prabhat Mishra, Nikil D. Dutt
LCTRTS
2007
Springer
14 years 1 months ago
Combining source-to-source transformations and processor instruction set extensions for the automated design-space exploration o
Industry’s demand for flexible embedded solutions providing high performance and short time-to-market has led to the development of configurable and extensible processors. The...
Richard Vincent Bennett, Alastair Colin Murray, Bj...
FPGA
2006
ACM
129views FPGA» more  FPGA 2006»
13 years 11 months ago
Power-aware RAM mapping for FPGA embedded memory blocks
Embedded memory blocks are important resources in contemporary FPGA devices. When targeting FPGAs, application designers often specify high-level memory functions which exhibit a ...
Russell Tessier, Vaughn Betz, David Neto, Thiagara...
RTAS
2005
IEEE
14 years 29 days ago
Improving WCET by Optimizing Worst-Case Paths
It is advantageous to perform compiler optimizations to lower the WCET of a task since tasks with lower WCETs are easier to schedule and more likely to meet their deadlines. Compi...
Wankang Zhao, William C. Kreahling, David B. Whall...