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CVPR
2009
IEEE
15 years 3 months ago
A Convex Relaxation Approach for Computing Minimal Partitions
In this work we propose a convex relaxation approach for computing minimal partitions. Our approach is based on rewriting the minimal partition problem (also known as Potts mode...
Thomas Pock (Graz University of Technology), Anton...
JAIR
2008
123views more  JAIR 2008»
13 years 8 months ago
CTL Model Update for System Modifications
Model checking is a promising technology, which has been applied for verification of many hardware and software systems. In this paper, we introduce the concept of model update to...
Yan Zhang, Yulin Ding
ISPD
1999
ACM
98views Hardware» more  ISPD 1999»
14 years 23 days ago
Towards synthetic benchmark circuits for evaluating timing-driven CAD tools
For the development and evaluation of CAD-tools for partitioning, floorplanning, placement, and routing of digital circuits, a huge amount of benchmark circuits with suitable cha...
Dirk Stroobandt, Peter Verplaetse, Jan Van Campenh...
IPPS
2002
IEEE
14 years 1 months ago
Variable Partitioning and Scheduling of Multiple Memory Architectures for DSP
Multiple memory module architecture enjoys higher memory access bandwidth and thus higher performance. Two key problems in gaining high performance in this kind of architecture ar...
Qingfeng Zhuge, Bin Xiao, Edwin Hsing-Mean Sha
FCCM
2006
IEEE
106views VLSI» more  FCCM 2006»
14 years 2 months ago
Scalable Hardware Architecture for Real-Time Dynamic Programming Applications
Abstract— This paper introduces a novel architecture for performing the core computations required by dynamic programming (DP) techniques. The latter pertain to a vast range of a...
Brad Matthews, Itamar Elhanany