In previous work we have developed and prototyped a silicon compiler which translates a functional language (SAFL) into hardware. Here we present a SAFL-level program transformati...
Abstract -- This paper introduces a new HW/SW partitioning algorithm used in automating the instruction set processor design for pipelined ASIP (Application Specific Integrated Pro...
This paper presents a codesign approach which incorporates communication protocol selection as a design parameter within hardware/software partitioning. The presented approach tak...
We propose a new parallelization scheme for the hmmsearch function of the HMMER software, in order to target FPGA technology. hmmsearch is a very compute intensive software for bio...
—In this paper, a novel approach for integrating static non-preemptive software scheduling in formal bottom-up performance evaluation of embedded system models is described. The ...
Alexander Viehl, Michael Pressler, Oliver Bringman...