145 search results - page 20 / 29 » Towards an efficient switch architecture for high-radix swit... |
ANCS
2008
ACM
13 years 9 months ago
2008
ACM
Today's routers need to perform packet classification at wire speed in order to provide critical services such as traffic billing, priority routing and blocking unwanted Inte...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
SBCCI
2003
ACM
14 years 22 days ago
2003
ACM
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...
NOSSDAV
2005
Springer
14 years 1 months ago
2005
Springer
Wireless Network Interface (WNI) is one of the most critical components for power efficiency in multimedia streaming to mobile devices. A common strategy to save power is to switc...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
Device optimization considering supply voltage Vdd and threshold voltage Vt tuning does not increase chip area but has a great impact on power and performance in the nanometer tec...