72 search results - page 4 / 15 » Towards the Automatic Design of More Efficient Digital Circu... |
ASYNC
1998
IEEE
14 years 2 months ago
1998
IEEE
Analogue to digital (A-D) converters with a xed conversion time are subject to errors due to metastability. These errors will occur in all converter designs with a bounded time fo...
ICCAD
2009
IEEE
13 years 8 months ago
2009
IEEE
Boolean satisfiability (SAT) based methods have traditionally been popular for formally verifying properties for digital circuits. We present a novel methodology for formulating a...
CSREAESA
2003
13 years 11 months ago
2003
Most so-called “adiabatic” digital logic circuit families reported in the low-power design literature are actually not truly adiabatic, in that they do not satisfy the general...
GECCO
2005
Springer
14 years 3 months ago
2005
Springer
Embedded Cartesian Genetic Programming (ECGP) is a form of the graph based Cartesian Genetic Programming (CGP) in which modules are automatically acquired and evolved. In this pap...
FPGA
1999
ACM
14 years 2 months ago
1999
ACM
Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...