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ICALT
2007
IEEE
14 years 3 months ago
Bayesian Modelling of Confusability of Phoneme-Grapheme Connections
Deficiencies in the ability to map letters to sounds are currently considered to be the most likely early signs of dyslexia [4]. This has motivated the use of Literate, a compute...
Mikko Vilenius, Janne V. Kujala, Ulla Richardson, ...
INFOCOM
2007
IEEE
14 years 3 months ago
Neighborhood Watch for Internet Routing: Can We Improve the Robustness of Internet Routing Today?
— Protecting BGP routing from errors and malice is one of the next big challenges for Internet routing. Several approaches have been proposed that attempt to capture and block ro...
Georgos Siganos, Michalis Faloutsos
IPPS
2007
IEEE
14 years 3 months ago
Pipelining Tradeoffs of Massively Parallel SuperCISC Hardware Functions
Parallel processing using multiple processors is a well-established technique to accelerate many different classes of applications. However, as the density of chips increases, ano...
Colin J. Ihrig, Justin Stander, Alex K. Jones
ISCA
2007
IEEE
143views Hardware» more  ISCA 2007»
14 years 3 months ago
Interconnect design considerations for large NUCA caches
The ever increasing sizes of on-chip caches and the growing domination of wire delay necessitate significant changes to cache hierarchy design methodologies. Many recent proposal...
Naveen Muralimanohar, Rajeev Balasubramonian
ISQED
2007
IEEE
162views Hardware» more  ISQED 2007»
14 years 3 months ago
Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs
In high-level synthesis for FPGA designs, scheduling and chaining of operations for optimal performance remain challenging problems. In this paper, we present a balanced schedulin...
David Zaretsky, Gaurav Mittal, Robert P. Dick, Pri...