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DAC
2008
ACM
14 years 7 months ago
Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts
End-to-end latency of messages is an important design parameter that needs to be within specified bounds for the correct functioning of distributed real-time control systems. In t...
Swarup Mohalik, A. C. Rajeev, Manoj G. Dixit, S. R...
APIN
2006
136views more  APIN 2006»
13 years 6 months ago
Cell modeling with reusable agent-based formalisms
Biologists are building increasingly complex models and simulations of cells and other biological entities, and are looking at alternatives to traditional representations. Making ...
Ken Webb, Tony White
FDL
2007
IEEE
14 years 1 months ago
Automatic High Level Assertion Generation and Synthesis for Embedded System Design
SystemVerilog encapsulates both design description and verification properties in one language and provides a unified environment for engineers who have the formidable challenge o...
Lun Li, Frank P. Coyle, Mitchell A. Thornton
POPL
2006
ACM
14 years 7 months ago
Certified assembly programming with embedded code pointers
Embedded code pointers (ECPs) are stored handles of functions and continuations commonly seen in low-level binaries as well as functional or higher-order programs. ECPs are known ...
Zhaozhong Ni, Zhong Shao
DATE
2009
IEEE
120views Hardware» more  DATE 2009»
14 years 1 months ago
Towards a formal semantics for the AADL behavior annex
—AADL is an Architecture Description Language which describes embedded real-time systems. Behavior annex is an extension of the dispatch mechanism of AADL execution model. This p...
Zhibin Yang, Kai Hu, Dianfu Ma, Lei Pi