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DELTA
2006
IEEE
14 years 1 months ago
Synthesis of Fault-Tolerant Embedded Systems with Checkpointing and Replication
We present an approach to the synthesis of fault-tolerant hard real-time systems for safety-critical applications. We use checkpointing with rollback recovery and active replicati...
Viacheslav Izosimov, Paul Pop, Petru Eles, Zebo Pe...
DAC
2001
ACM
14 years 8 months ago
Transformations for the Synthesis and Optimization of Asynchronous Distributed Control
Asynchronous design has been the focus of renewed interest. However, a key bottleneck is the lack of high-quality CAD tools for the synthesis of large-scale systems which also all...
Michael Theobald, Steven M. Nowick
ICCAD
1995
IEEE
88views Hardware» more  ICCAD 1995»
13 years 11 months ago
LOT: logic optimization with testability-new transformations using recursive learning
: A new approach to optimize multi-level logic circuits is introduced. Given a multi-level circuit, the synthesis method optimizes its area, simultaneously enhancing its random pat...
Mitrajit Chatterjee, Dhiraj K. Pradhan, Wolfgang K...
ICCAD
2004
IEEE
64views Hardware» more  ICCAD 2004»
14 years 4 months ago
Simultaneous design and placement of multiplexed chemical processing systems on microchips
Microchip structures represent an attractive platform for microscale chemical processing of fluidic systems. However, standardized design methods for these devices have not yet b...
Anton J. Pfeiffer, Tamal Mukherjee, Steinar Hauan
DAC
2006
ACM
14 years 8 months ago
Placement of digital microfluidic biochips using the t-tree formulation
Droplet-based microfluidic biochips have recently gained much attention and are expected to revolutionize the biological laboratory procedure. As biochips are adopted for the comp...
Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang