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» Transformational Placement and Synthesis
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CASES
2004
ACM
14 years 1 months ago
High-level power analysis for on-chip networks
As on-chip networks become prevalent in multiprocessor systemson-a-chip and multi-core processors, they will be an integral part of the design flow of such systems. With power in...
Noel Eisley, Li-Shiuan Peh
SIGSOFT
2003
ACM
14 years 29 days ago
Refinements and multi-dimensional separation of concerns
1 Step-wise refinement (SWR) asserts that complex programs can be derived from simple programs by progressively adding features. The length of a program specification is the number...
Don S. Batory, Jia Liu, Jacob Neal Sarvela
BILDMED
2007
13 years 9 months ago
Pose Estimation of Eyes for Particle Beam Treatment of Tumors
To assure a correct position and orientation of the patient’s eye in radiation treatment, a new approach in image-guided radiotherapy is used to determine the misalignment of the...
Boris Peter Selby, Georgios Sakas, Stefan Walter, ...
ICCAD
2003
IEEE
120views Hardware» more  ICCAD 2003»
14 years 4 months ago
RTL Power Optimization with Gate-Level Accuracy
Traditional RTL power optimization techniques commit transformations at the RTL based on the estimation of area, delay and power. However, because of inadequate power and delay in...
Qi Wang, Sumit Roy
FPGA
2006
ACM
139views FPGA» more  FPGA 2006»
13 years 11 months ago
Fast and accurate resource estimation of automatically generated custom DFT IP cores
This paper presents an equation-based resource utilization model for automatically generated discrete Fourier transform (DFT) soft core IPs. The parameterized DFT IP generator all...
Peter A. Milder, Mohammad Ahmad, James C. Hoe, Mar...