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ASPDAC
2004
ACM
107views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Minimization of the expected path length in BDDs based on local changes
— In many verification tools methods for functional simulation based on reduced ordered Binary Decision Diagrams (BDDs) are used. The evaluation time for a BDD can be crucial an...
Rüdiger Ebendt, Wolfgang Günther, Rolf D...
ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
13 years 11 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah