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» Transistor-Level Timing Analysis Using Embedded Simulation
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NCA
2002
IEEE
13 years 10 months ago
The Construction of Smooth Models using Irregular Embeddings Determined by a Gamma Test Analysis
One of the key problems in forming a smooth model from input-output data is the determination of which input variables are relevant in predicting a given output. In this paper we ...
Alban P. M. Tsui, Antonia J. Jones, A. Guedes de O...
DATE
2005
IEEE
154views Hardware» more  DATE 2005»
14 years 4 months ago
Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring
— Security is emerging as an important concern in embedded system design. The security of embedded systems is often compromised due to vulnerabilities in “trusted” software t...
Divya Arora, Srivaths Ravi, Anand Raghunathan, Nir...
ICCAD
2001
IEEE
84views Hardware» more  ICCAD 2001»
14 years 7 months ago
Stars in VCC: Complementing Simulation with Worst-Case Analysis
tems. STARS manipulates abstract representations of system components to obtain upper bounds on the number of various events in the system, as well as a bound on the response time....
Felice Balarin
DATE
2008
IEEE
163views Hardware» more  DATE 2008»
14 years 19 days ago
A Simulation Methodology for Worst-Case Response Time Estimation of Distributed Real-Time Systems
In this paper, we propose a simulation-based methodology for worst-case response time estimation of distributed realtime systems. Schedulability analysis produces pessimistic uppe...
Soheil Samii, Sergiu Rafiliu, Petru Eles, Zebo Pen...
IPPS
2003
IEEE
14 years 4 months ago
SoCBUS: Switched Network on Chip for Hard Real Time Embedded Systems
With the current trend in integration of more complex systems on chip there is a need for better communication infrastructure on chip that will increase the available bandwidth an...
Daniel Wiklund, Dake Liu