Sciweavers

21 search results - page 3 / 5
» Transistor-level based defect tolerance for reliable nanoele...
Sort
View
ICCD
2003
IEEE
113views Hardware» more  ICCD 2003»
14 years 4 months ago
Exploiting Microarchitectural Redundancy For Defect Tolerance
Continued advancements in fabrication technology and reductions in feature size create challenges in maintaining both manufacturing yield rates and long-term reliability of device...
Premkishore Shivakumar, Stephen W. Keckler, Charle...
ARCS
2008
Springer
13 years 9 months ago
Topology-Aware Replica Placement in Fault-Tolerant Embedded Networks
Application details uncertain at design time as well as tolerance against permanent resource defects demand flexibility and redundancy. In this context, we present a strategy for p...
Thilo Streichert, Michael Glaß, Rolf Wanka, ...
DAC
2006
ACM
14 years 8 months ago
Timing-based delay test for screening small delay defects
The delay fault test pattern set generated by timing unaware commercial ATPG tools mostly affects very short paths, thereby increasing the escape chance of smaller delay defects. ...
Nisar Ahmed, Mohammad Tehranipoor, Vinay Jayaram
MICRO
2007
IEEE
159views Hardware» more  MICRO 2007»
14 years 1 months ago
Software-Based Online Detection of Hardware Defects Mechanisms, Architectural Support, and Evaluation
As silicon process technology scales deeper into the nanometer regime, hardware defects are becoming more common. Such defects are bound to hinder the correct operation of future ...
Kypros Constantinides, Onur Mutlu, Todd M. Austin,...
MTDT
2003
IEEE
100views Hardware» more  MTDT 2003»
14 years 18 days ago
Optimal Spare Utilization in Repairable and Reliable Memory Cores
Advances in System-on-Chip (SoC) technology rely on manufacturing and assembling high-performance system cores for many critical applications. Among these cores, memory occupies t...
Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-...