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» Translation validation for an optimizing compiler
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LCPC
2007
Springer
14 years 2 months ago
Pillar: A Parallel Implementation Language
Abstract. As parallelism in microprocessors becomes mainstream, new programming languages and environments are emerging to meet the challenges of parallel programming. To support r...
Todd Anderson, Neal Glew, Peng Guo, Brian T. Lewis...
CODES
2005
IEEE
14 years 2 months ago
Memory access optimizations in instruction-set simulators
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
Mehrdad Reshadi, Prabhat Mishra
BMCBI
2007
130views more  BMCBI 2007»
13 years 8 months ago
A model-based optimization framework for the inference of regulatory interactions using time-course DNA microarray expression da
Background: Proteins are the primary regulatory agents of transcription even though mRNA expression data alone, from systems like DNA microarrays, are widely used. In addition, th...
Reuben Thomas, Carlos J. Paredes, Sanjay Mehrotra,...
CASES
2006
ACM
14 years 2 months ago
Code transformation strategies for extensible embedded processors
Embedded application requirements, including high performance, low power consumption and fast time to market, are uncommon in the broader domain of general purpose applications. I...
Paolo Bonzini, Laura Pozzi
MICRO
2002
IEEE
117views Hardware» more  MICRO 2002»
13 years 8 months ago
Generating physical addresses directly for saving instruction TLB energy
Power consumption and power density for the Translation Lookaside Buffer (TLB) are important considerations not only in its design, but can have a consequence on cache design as w...
Ismail Kadayif, Anand Sivasubramaniam, Mahmut T. K...