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ISPASS
2007
IEEE
14 years 2 months ago
PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator
In this paper, we introduce PTLsim, a cycle accurate full system x86-64 microprocessor simulator and virtual machine. PTLsim models a modern superscalar out of order x86-64 proces...
Matt T. Yourst
MICRO
1997
IEEE
116views Hardware» more  MICRO 1997»
14 years 22 days ago
Tuning Compiler Optimizations for Simultaneous Multithreading
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...
Jack L. Lo, Susan J. Eggers, Henry M. Levy, Sujay ...
ISCA
2010
IEEE
163views Hardware» more  ISCA 2010»
14 years 1 months ago
WiDGET: Wisconsin decoupled grid execution tiles
The recent paradigm shift to multi-core systems results in high system throughput within a specified power budget. However, future systems still require good single thread perfor...
Yasuko Watanabe, John D. Davis, David A. Wood
SIGOPS
2011
255views Hardware» more  SIGOPS 2011»
13 years 3 months ago
Bridging functional heterogeneity in multicore architectures
Heterogeneous processors that mix big high performance cores with small low power cores promise excellent single– threaded performance coupled with high multi–threaded through...
Dheeraj Reddy, David A. Koufaty, Paul Brett, Scott...
IPPS
2005
IEEE
14 years 2 months ago
Predicting Cache Space Contention in Utility Computing Servers
The need to provide performance guarantee in high performance servers has long been neglected. Providing performance guarantee in current and future servers is difficult because ...
Yan Solihin, Fei Guo, Seongbeom Kim