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ISPD
2003
ACM
133views Hardware» more  ISPD 2003»
14 years 1 months ago
Optimal minimum-delay/area zero-skew clock tree wire-sizing in pseudo-polynomial time
In 21st-Century VLSI design, clocking plays crucial roles for both performance and timing convergence. Due to their non-convex nature, optimal minimum-delay/area zero-skew wire-si...
Jeng-Liang Tsai, Tsung-Hao Chen, Charlie Chung-Pin...
ICCAD
1995
IEEE
113views Hardware» more  ICCAD 1995»
13 years 12 months ago
Logic decomposition during technology mapping
—A problem in technology mapping is that the quality of the final implementation depends significantly on the initially provided circuit structure. This problem is critical, es...
Eric Lehman, Yosinori Watanabe, Joel Grodstein, He...
CN
2006
66views more  CN 2006»
13 years 8 months ago
Secure acknowledgment aggregation and multisignatures with limited robustness
In certain reliable group-oriented and multicast applications, a source needs to securely verify whether all (and if not all, which) intended receivers have received a message. How...
Claude Castelluccia, Stanislaw Jarecki, Jihye Kim,...
DAC
2011
ACM
12 years 8 months ago
Synchronous sequential computation with molecular reactions
Just as electronic systems implement computation in terms of voltage (energy per unit charge), molecular systems compute in terms of chemical concentrations (molecules per unit vo...
Hua Jiang, Marc D. Riedel, Keshab K. Parhi
CG
2006
Springer
13 years 8 months ago
Interactive out-of-core isosurface visualisation in time-varying data sets
We present a combination of techniques for interactive out-of-core visualisation of isosurfaces from large timedependent data sets. We make use of an index tree, computed in a pre...
Benjamin Vrolijk, Frits H. Post