895 search results - page 101 / 179 » Triangulating Topological Spaces |
GLVLSI
2009
IEEE
14 years 5 months ago
2009
IEEE
In the context of nanoscale networks-on-chip (NoCs), each link implementation solution is not just a specific synthesis optimization technique with local performance and power im...
DAC
2003
ACM
14 years 4 months ago
2003
ACM
We present a new technique to examine the trade-off regions of a circuit where its competing performances become “simultaneously optimal”, i.e. Pareto optimal. It is based on ...
GRAPHICSINTERFACE
2001
14 years 10 days ago
2001
This paper presents a novel selective refinement scheme of progressive meshes. In previous schemes, topology information in the neighborhood of a collapsed edge is stored in the a...
TCAD
1998
13 years 10 months ago
1998
— Conventional methods for optimal sizing of wires and transistors use linear resistor-capacitor (RC) circuit models and the Elmore delay as a measure of signal delay. If the RC ...
INFOCOM
2010
IEEE
13 years 9 months ago
2010
IEEE
Abstract—Distributed storage systems provide large-scale reliable data storage by storing a certain degree of redundancy in a decentralized fashion on a group of storage nodes. T...