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» Trusted Design in FPGAs
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FPGA
1995
ACM
110views FPGA» more  FPGA 1995»
13 years 11 months ago
Design of FPGAs with Area I/O for Field Programmable MCM
Area-IO provide a way to eliminate the IO bottleneck of eld programmable logic devices (FPLDs) created the mismatch between the ability of perimeter bonds to provide IO and and t...
Vijayshri Maheshwari, Joel Darnauer, John Ramirez,...
ICDCSW
2002
IEEE
14 years 10 days ago
Switchboard: Secure, Monitored Connections for Client-Server Communication
Prolonged secure communication requires trust relationships that extend throughout a connection’s life cycle. Current tools to establish secure connections such as SSL/TLS and S...
Eric Freudenthal, Lawrence Port, Tracy Pesin, Edwa...
VTS
2005
IEEE
90views Hardware» more  VTS 2005»
14 years 29 days ago
Soft Error Mitigation for SRAM-Based FPGAs
FPGA-based designs are more susceptible to single-event upsets (SEUs) compared to ASIC designs, since SEUs in configuration bits of FPGAs result in permanent errors in the mapped...
Ghazanfar Asadi, Mehdi Baradaran Tahoori
FPGA
2004
ACM
234views FPGA» more  FPGA 2004»
13 years 11 months ago
An embedded true random number generator for FPGAs
Field Programmable Gate Arrays (FPGAs) are an increasingly popular choice of platform for the implementation of cryptographic systems. Until recently, designers using FPGAs had le...
Paul Kohlbrenner, Kris Gaj