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» Tutorial: Design of a Logic Synthesis System
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DATE
2010
IEEE
119views Hardware» more  DATE 2010»
14 years 13 days ago
Exploiting local logic structures to optimize multi-core SoC floorplanning
Abstract—We present a throughput-driven partitioning algorithm and a throughput-preserving merging algorithm for the high-level physical synthesis of latency-insensitive (LI) sys...
Cheng-Hong Li, Sampada Sonalkar, Luca P. Carloni
ICCAD
2003
IEEE
109views Hardware» more  ICCAD 2003»
14 years 4 months ago
Large-Scale Circuit Placement: Gap and Promise
Placement is one of the most important steps in the RTLto-GDSII synthesis process, as it directly defines the interconnects, which have become the bottleneck in circuit and syste...
Jason Cong, Tim Kong, Joseph R. Shinnerl, Min Xie,...
ICCAD
2005
IEEE
98views Hardware» more  ICCAD 2005»
14 years 4 months ago
Clustering for processing rate optimization
Clustering (or partitioning) is a crucial step between logic synthesis and physical design in the layout of a large scale design. A design verified at the logic synthesis level m...
Chuan Lin, Jia Wang, Hai Zhou

Lecture Notes
1005views
15 years 7 months ago
Lectures on reconfigurable computing
Driven by recent innovations in Field-Programmable Gate Arrays (FPGAs), reconfigurable computing offers unique ways to accelerate key algorithms. FPGAs offer a programmable logic f...
Sherief Reda
AC
2003
Springer
14 years 18 days ago
Petri Nets and Manufacturing Systems: An Examples-Driven Tour
Abstract. There exists ample literature on Petri nets and its potential in the modelling, analysis, synthesis and implementation of systems in the manufacturing applications domain...
Laura Recalde, Manuel Silva, Joaquin Ezpeleta, Enr...