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» Two efficient methods to reduce power and testing time
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COMPUTING
2004
107views more  COMPUTING 2004»
15 years 4 months ago
Efficient Collision Detection for Moving Ellipsoids Using Separating Planes
We present a simple, accurate and efficient algorithm for collision detection among moving ellipsoids. Its efficiency is attributed to two results: (i) a simple algebraic test for...
Wenping Wang, Yi-King Choi, Bin Chan, Myung-Soo Ki...
ISVLSI
2008
IEEE
136views VLSI» more  ISVLSI 2008»
15 years 10 months ago
A Real Case of Significant Scan Test Cost Reduction
With the advent of nanometer technologies, the design size of integrated circuits is getting larger and the operation speed is getting faster. As a consequence, test cost is becom...
Selina Sha, Bruce Swanson
JSS
2007
67views more  JSS 2007»
15 years 4 months ago
TFRP: An efficient microaggregation algorithm for statistical disclosure control
Recently, the issue of Statistic Disclosure Control (SDC) has attracted much attention. SDC is a very important part of data security dealing with the protection of databases. Micr...
Chin-Chen Chang, Yu-Chiang Li, Wen-Hung Huang
DATE
2008
IEEE
76views Hardware» more  DATE 2008»
15 years 11 months ago
Signal Probability Based Statistical Timing Analysis
VLSI timing analysis and power estimation target the same circuit switching activity. Power estimation techniques are categorized as (1) static, (2) statistical, and (3) simulatio...
Bao Liu
ASPDAC
2008
ACM
91views Hardware» more  ASPDAC 2008»
15 years 6 months ago
Heuristic power/ground network and floorplan co-design method
It's a trend to consider power supply integrity at early stage to improve the design quality. In this paper, we propose a novel algorithm to optimize floorplan together with P...
Xiaoyi Wang, Jin Shi, Yici Cai, Xianlong Hong