524 search results - page 29 / 105 » Two efficient methods to reduce power and testing time |
179
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DFT
2002
IEEE
15 years 9 months ago
2002
IEEE
This paper describes a new compression/decompression methodology for using an embedded processor to test the other components of a system-on-a-chip (SoC). The deterministic test v...
126
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ETS
2009
IEEE
15 years 2 months ago
2009
IEEE
This paper reports two novel algorithms based on time-modulo reconstruction method intended for detection of the parametric faults in analogue-to-digital converters (ADC). In both ...
146
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KBSE
2003
IEEE
15 years 9 months ago
2003
IEEE
The use of techniques for automating the generation of software test cases is very important as it can reduce the time and cost of this process. The latest methods for automatic g...
121
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CIKM
2007
Springer
15 years 8 months ago
2007
Springer
Information retrieval experimentation generally proceeds in a cycle of development, evaluation, and hypothesis testing. Ideally, the evaluation and testing phases should be short ...
129
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DAC
2000
ACM
16 years 5 months ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...