Sciweavers

4116 search results - page 57 / 824
» Type Analysis for CHIP
Sort
View
APLAS
2008
ACM
13 years 10 months ago
Sound and Complete Type Inference for a Systems Programming Language
This paper introduces a new type system designed for safe systems programming. The type system features a new mutability model that combines unboxed types with a consistent typing ...
Swaroop Sridhar, Jonathan S. Shapiro, Scott F. Smi...
DAC
2008
ACM
13 years 10 months ago
Application mapping for chip multiprocessors
The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multiprocessor (CMP) architecture in a locality-aware fas...
Guangyu Chen, Feihui Li, Seung Woo Son, Mahmut T. ...
CJ
2006
84views more  CJ 2006»
13 years 8 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
ISCA
2008
IEEE
114views Hardware» more  ISCA 2008»
14 years 3 months ago
Globally-Synchronized Frames for Guaranteed Quality-of-Service in On-Chip Networks
Future chip multiprocessors (CMPs) may have hundreds to thousands of threads competing to access shared resources, and will require quality-of-service (QoS) support to improve sys...
Jae W. Lee, Man Cheuk Ng, Krste Asanovic
ENTCS
2007
109views more  ENTCS 2007»
13 years 8 months ago
Free Theorems and Runtime Type Representations
’s abstraction theorem [21], often referred to as the parametricity theorem, can be used to derive properties about functional programs solely from their types. Unfortunately, i...
Dimitrios Vytiniotis, Stephanie Weirich