4116 search results - page 58 / 824 » Type Analysis for CHIP |
PPOPP
2009
ACM
14 years 9 months ago
2009
ACM
Data prefetching has been widely used in the past as a technique for hiding memory access latencies. However, data prefetching in multi-threaded applications running on chip multi...
IEEEPACT
2009
IEEE
14 years 3 months ago
2009
IEEE
Abstract—This paper proposes a new software-oriented approach for managing the distributed shared L2 caches of a chip multiprocessor (CMP) for latency-oriented multithreaded appl...
ISCA
2008
IEEE
14 years 3 months ago
2008
IEEE
Recently, Network-on-Chip (NoC) architectures have gained popularity to address the interconnect delay problem for designing CMP / multi-core / SoC systems in deep sub-micron tech...
ICS
2001
Tsinghua U.
14 years 1 months ago
2001
Tsinghua U.
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
FPCA
1995
14 years 8 days ago
1995
A number of useful optimisations are enabled if we can determine when a value is accessed at most once. We extend the Hindley-Milner type system with uses, yielding a typeinferenc...