872 search results - page 105 / 175 » UML-based design test generation |
129
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LCTRTS
2007
Springer
15 years 10 months ago
2007
Springer
This paper presents a tool for automatic synthesis of RTL interfaces for heterogeneous MPSoC from transaction level models (TLMs). The tool captures the communication parameters i...
139
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FDL
2008
IEEE
15 years 10 months ago
2008
IEEE
Constraint-based random simulation is state-of-the-art in verification of multi-million gate industrial designs. This method is based on stimulus generation by constraint solving...
144
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RTAS
2009
IEEE
15 years 10 months ago
2009
IEEE
Embedded systems in safety-critical environments demand safety guarantees while providing many useful services that are too complex to formally verify or fully test. Existing appl...
129
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MSE
2003
IEEE
15 years 9 months ago
2003
IEEE
A tool has been created for use in a design course to automate integration of new components into a SystemOn-Chip (SoC). Students used this tool to implement a complete SoC Intern...
133
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ASPDAC
2004
ACM
15 years 7 months ago
2004
ACM
The design of complex systems is largely ruled by the time needed for verification. Even though formal methods can provide higher reliability, in practice often simulation based ve...