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DAC
1998
ACM
16 years 5 months ago
Practical Experiences with Standard-Cell Based Datapath Design Tools: Do We Really Need Regular Layouts?
Commercial tools for standard-cell based datapath design are here classed according to design flows, and the advantages of each class are discussed with the results of two test ci...
Alexander Grießing, Paolo Ienne
FCCM
2003
IEEE
148views VLSI» more  FCCM 2003»
15 years 9 months ago
A Hardware Gaussian Noise Generator for Channel Code Evaluation
Hardware simulation of channel codes offers the potential of improving code evaluation speed by orders of magnitude over workstation- or PC-based simulation. We describe a hardwar...
Dong-U Lee, Wayne Luk, John D. Villasenor, Peter Y...
CEC
2008
IEEE
15 years 4 months ago
Design and implementation of a patterns recognition system for analysis of biological liquids
Given the great amount of data that are generated of the experiments to analyze information of extracted chemical fluids of the brain of a rodent, arises the necessity to design an...
Jose Aguilar, Luis Hernandez, Anny Olivar
ICSE
2001
IEEE-ACM
15 years 8 months ago
A Scalable Formal Method for Design and Automatic Checking of User Interfaces
The paper addresses the formal specification, design and implementation of the behavioral component of graphical user interfaces. The complex sequences of visual events and action...
Jean Berstel, Stefano Crespi-Reghizzi, Gilles Rous...
GLVLSI
2009
IEEE
113views VLSI» more  GLVLSI 2009»
15 years 8 months ago
Reducing parity generation latency through input value aware circuits
1 Soft errors caused by cosmic particles and radiation emitted by the packaging are an important problem in contemporary microprocessors. Parity bits are used to detect single bit ...
Yusuf Osmanlioglu, Y. Onur Koçberber, Oguz ...