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LCTRTS
2007
Springer
14 years 1 months ago
Interface synthesis for heterogeneous multi-core systems from transaction level models
This paper presents a tool for automatic synthesis of RTL interfaces for heterogeneous MPSoC from transaction level models (TLMs). The tool captures the communication parameters i...
Hansu Cho, Samar Abdi, Daniel Gajski
CCECE
2006
IEEE
14 years 1 months ago
QOS Driven Network-on-Chip Design for Real Time Systems
Real Time embedded system designers are facing extreme challenges in underlying architectural design selection. It involves the selection of a programmable, concurrent, heterogene...
Ankur Agarwal, Mehmet Mustafa, Abhijit S. Pandya
DAC
2006
ACM
14 years 8 months ago
Multiprocessor system-on-chip data reuse analysis for exploring customized memory hierarchies
The increasing use of Multiprocessor Systems-on-Chip (MPSoCs) for high performance demands of embedded applications results in high power dissipation. The memory subsystem is a la...
Ilya Issenin, Erik Brockmeyer, Bart Durinck, Nikil...
SAMOS
2005
Springer
14 years 1 months ago
A Case for Visualization-Integrated System-Level Design Space Exploration
Design space exploration plays an essential role in the system-level design of embedded systems. It is imperative therefore to have efficient and effective exploration tools in th...
Andy D. Pimentel
TC
1998
13 years 7 months ago
Using System-Level Models to Evaluate I/O Subsystem Designs
—We describe a system-level simulation model and show that it enables accurate predictions of both I/O subsystem and overall system performance. In contrast, the conventional app...
Gregory R. Ganger, Yale N. Patt