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» Ultra-low power digital subthreshold logic circuits
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GLVLSI
2003
IEEE
166views VLSI» more  GLVLSI 2003»
14 years 2 months ago
Exponential split accumulator for high-speed reduced area low-power direct digital frequency synthesizers
A new split accumulator architecture to be used in direct digital frequency synthesizers (DDFS) systems is presented. This new design eliminates the need of adders on the section ...
Edward Merlo, Kwang-Hyun Baek, Myung-Jun Choe
CASES
2008
ACM
13 years 10 months ago
Active control and digital rights management of integrated circuit IP cores
We introduce the first approach that can actively control multiple hardware intellectual property (IP) cores used in an integrated circuit (IC). The IP rights owner(s) can remotel...
Yousra Alkabani, Farinaz Koushanfar
TE
2010
104views more  TE 2010»
13 years 3 months ago
Integrating Asynchronous Digital Design Into the Computer Engineering Curriculum
Abstract--As demand increases for circuits with higher performance, higher complexity, and decreased feature size, asynchronous (clockless) paradigms will become more widely used i...
Scott C. Smith, Waleed Al-Assadi, Jia Di
CSREAESA
2004
13 years 10 months ago
Driving Fully-Adiabatic Logic Circuits Using Custom High-Q MEMS Resonators
To perform digital logic in CMOS in a truly adiabatic (asymptotically thermodynamically reversible) fashion requires that logic transitions be driven by a quasitrapezoidal (flat-t...
Venkiteswaran Anantharam, Maojiao He, Krishna Nata...
CDES
2006
99views Hardware» more  CDES 2006»
13 years 10 months ago
Realization of Digital Fuzzy Operations Using Multi-Valued Fredkin Gates
Multi-valued Fredkin gates (MVFG) are reversible gates and they can be considered as modified version of the better known reversible gate the Fredkin gate. Reversible logic gates ...
Amin Ahsan Ali, Hafiz Md. Hasan Babu, Ahsan Raja C...