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HPCA
2003
IEEE
14 years 10 months ago
TCP: Tag Correlating Prefetchers
Although caches for decades have been the backbone of the memory system, the speed gap between CPU and main memory suggests their augmentation with prefetching mechanisms. Recentl...
Zhigang Hu, Margaret Martonosi, Stefanos Kaxiras
NOSSDAV
2009
Springer
14 years 4 months ago
Web 2.0 traffic measurement: analysis on online map applications
In recent years, web based online map applications have been getting more and more popular, such as Google Maps, Yahoo Maps. Many new Web 2.0 techniques such as mash-up and AJAX w...
Song Lin, Zhiguo Gao, Ke Xu
ACSAC
2008
IEEE
14 years 4 months ago
New Side Channels Targeted at Passwords
Side channels are typically viewed as attacks that leak cryptographic keys during cryptographic algorithm processing, by observation of system side effects. In this paper, we pres...
Albert Tannous, Jonathan T. Trostle, Mohamed Hassa...
MICRO
2006
IEEE
144views Hardware» more  MICRO 2006»
14 years 4 months ago
Die Stacking (3D) Microarchitecture
3D die stacking is an exciting new technology that increases transistor density by vertically integrating two or more die with a dense, high-speed interface. The result of 3D die ...
Bryan Black, Murali Annavaram, Ned Brekelbaum, Joh...
ICPP
2005
IEEE
14 years 3 months ago
Exploring Processor Design Options for Java-Based Middleware
Java-based middleware is a rapidly growing workload for high-end server processors, particularly Chip Multiprocessors (CMP). To help architects design future microprocessors to ru...
Martin Karlsson, Erik Hagersten, Kevin E. Moore, D...