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» Uncertainty-aware circuit optimization
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GECCO
2009
Springer
130views Optimization» more  GECCO 2009»
14 years 5 months ago
Liposome logic
VLSI research, in its continuous push toward further miniaturisation, is seeking to break through the limitations of current circuit manufacture techniques by moving towards biomi...
James Smaldon, Natalio Krasnogor, Alexander Camero...
CODES
2007
IEEE
14 years 5 months ago
Thread warping: a framework for dynamic synthesis of thread accelerators
We present a dynamic optimization technique, thread warping, that uses a single processor on a multiprocessor system to dynamically synthesize threads into custom accelerator circ...
Greg Stitt, Frank Vahid
ISCAS
2006
IEEE
118views Hardware» more  ISCAS 2006»
14 years 4 months ago
A robust continuous-time multi-dithering technique for laser communications using adaptive optics
A robust system architecture to achieve optical coherency free optimization. Several methods that had been proposed in the in multiple-beam free-space laser communication links wit...
Dimitrios N. Loizos, Paul-Peter Sotiriadis, Gert C...
ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
14 years 4 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
SBCCI
2005
ACM
114views VLSI» more  SBCCI 2005»
14 years 4 months ago
Traffic generation and performance evaluation for mesh-based NoCs
The designer of a system on a chip (SoC) that connects IP cores through a network on chip (NoC) needs methods to support application performance evaluation. Two key aspects these ...
Leonel Tedesco, Aline Mello, Diego Garibotti, Ney ...