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» Understanding POWER multiprocessors
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ICCD
2007
IEEE
98views Hardware» more  ICCD 2007»
14 years 7 months ago
Evaluating voltage islands in CMPs under process variations
Parameter variations are a major factor causing powerperformance asymmetry in chip multiprocessors. In this paper, we analyze the effects of with-in-die (WID) process variations o...
Abhishek Das, Serkan Ozdemir, Gokhan Memik, Alok N...
ISQED
2010
IEEE
133views Hardware» more  ISQED 2010»
13 years 8 months ago
UC-PHOTON: A novel hybrid photonic network-on-chip for multiple use-case applications
Multiple use-case chip multiprocessor (CMP) applications require adaptive on-chip communication fabrics to cope with changing use-case performance needs. Networks-on-chip (NoC) ha...
Shirish Bahirat, Sudeep Pasricha
ECLIPSE
2005
ACM
14 years 7 hour ago
An analysis and visualization for revealing object sharing
Sharing mutable data (via aliasing) is a powerful programming technique. To facilitate sharing, object-oriented programming languages permit the programmer to selectively break en...
Derek Rayside, Lucy Mendel, Robert Seater, Daniel ...
CAISE
2004
Springer
14 years 3 months ago
A Better Fit - Characterising the Stakeholders
The foundations of support for any business process lie in understanding the needs of people, the stakeholders in business processes and support systems. Stakeholder analysis has b...
Ian F. Alexander
CODES
2006
IEEE
14 years 4 months ago
Data reuse driven energy-aware MPSoC co-synthesis of memory and communication architecture for streaming applications
The memory subsystem of a complex multiprocessor systemson-chip (MPSoC) is an important contributor to the chip power consumption. The selection of memory architecture, as well as...
Ilya Issenin, Nikil Dutt