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ICCD
2007
IEEE
195views Hardware» more  ICCD 2007»
13 years 11 months ago
LEMap: Controlling leakage in large chip-multiprocessor caches via profile-guided virtual address translation
The emerging trend of larger number of cores or processors on a single chip in the server, desktop, and mobile notebook platforms necessarily demands larger amount of on-chip last...
Jugash Chandarlapati, Mainak Chaudhuri
CASES
2006
ACM
13 years 11 months ago
Reaching fast code faster: using modeling for efficient software thread integration on a VLIW DSP
When integrating software threads together to boost performance on a processor with instruction-level parallel processing support, it is rarely clear which code regions should be ...
Won So, Alexander G. Dean
ICRA
2000
IEEE
163views Robotics» more  ICRA 2000»
13 years 11 months ago
The Anthropomorphic Biped Robot BIP2000
This paper describes the progress of the BIP2000 project. This project, in which four laboratories are involved for 4 years, as uimed at the realization of the lower part of an an...
Bernard Espiau, Philippe Sardain
VISUALIZATION
1995
IEEE
13 years 11 months ago
An Integrated Approach for Steering, Visualization, and Analysis of Atmospheric Simulations
In the research described here, we have constructed at tightly coupled set of methods for monitoring, steering, and applying visual analysis to large scale simulations. This work ...
Yves Jean, Thomas Kindler, William Ribarsky, Weimi...
VLDB
1987
ACM
78views Database» more  VLDB 1987»
13 years 11 months ago
Measured Performance of Time Interval Concurrency Control Techniques
This paper reports on an implementation of Bayer's Time Interval concurrency control method and compares it to the performance of a conventional timestamp method. The impleme...
Jerre D. Noe, David B. Wagner