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» Use of local biasing in designing analog integrated circuits
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DAC
2006
ACM
14 years 1 months ago
Design in reliability for communication designs
Silicon design implementation has become increasingly complex with the deep submicron technologies such as 90nm and below. It is common to see multiple processor cores, several ty...
Uday Reddy Bandi, Murty Dasaka, Pavan K. Kumar
ISCAS
2006
IEEE
84views Hardware» more  ISCAS 2006»
14 years 1 months ago
Programmable synaptic weights for an aVLSI network of spiking neurons
—We describe a spiking neuronal network which allows local synaptic weights to be assigned to individual synapses. In previous implementations of neuronal networks, the biases th...
Yingxue Wang, Shih-Chii Liu
ISLPED
2003
ACM
94views Hardware» more  ISLPED 2003»
14 years 27 days ago
A 0.75-mW analog processor IC for wireless biosignal monitor
This work presents a single-channel analog processor IC for the wireless biosignal monitor. This chip occupies a small die area of 0.52 mm2 and has a low power consumption of 0.75...
Chih-Jen Yen, Mely Chen Chi, Wen-Yaw Chung, Shing-...
AHS
2006
IEEE
130views Hardware» more  AHS 2006»
14 years 1 months ago
Self-Adaptive System Based on Field Programmable Gate Array for Extreme Temperature Electronics
Space missions often require radiation and extreme-temperature hardened electronics to survive the harsh environments beyond earth’s atmosphere. Traditional approaches to preser...
Didier Keymeulen, Ricardo Salem Zebulum, Rajeshuni...
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
14 years 4 months ago
Joint design-time and post-silicon minimization of parametric yield loss using adjustable robust optimization
Parametric yield loss due to variability can be effectively reduced by both design-time optimization strategies and by adjusting circuit parameters to the realizations of variable...
Murari Mani, Ashish Kumar Singh, Michael Orshansky