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» Use of local biasing in designing analog integrated circuits
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IJON
2006
73views more  IJON 2006»
13 years 7 months ago
Selective attention implemented with dynamic synapses and integrate-and-fire neurons
Selective attention is a process widely used by biological sensory systems to overcome the problem of limited parallel processing capacity: salient subregions of the input stimuli...
Chiara Bartolozzi, Giacomo Indiveri
VLSID
2009
IEEE
155views VLSI» more  VLSID 2009»
14 years 8 months ago
Unified Challenges in Nano-CMOS High-Level Synthesis
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
Saraju P. Mohanty
ITC
1996
IEEE
78views Hardware» more  ITC 1996»
13 years 11 months ago
Realistic-Faults Mapping Scheme for the Fault Simulation of Integrated Analogue CMOS Circuits
common use is the distinction into two (abstract) fault models: A new fault modelling scheme for integrated analogue general the "Single Hard Fault Model (SHFM)" and the ...
Michael J. Ohletz
IPSN
2007
Springer
14 years 1 months ago
Lucid dreaming: reliable analog event detection for energy-constrained applications
— Existing sensor network architectures are based on the assumption that data will be polled. Therefore, they are not adequate for long-term battery-powered use in applications t...
Sasha Jevtic, Mathew Kotowsky, Robert P. Dick, Pet...
TIM
2010
294views Education» more  TIM 2010»
13 years 2 months ago
Standby Leakage Power Reduction Technique for Nanoscale CMOS VLSI Systems
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the ...
HeungJun Jeon, Yong-Bin Kim, Minsu Choi