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» Use of local biasing in designing analog integrated circuits
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ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
14 years 1 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
GECCO
2006
Springer
143views Optimization» more  GECCO 2006»
13 years 11 months ago
A hybridized genetic parallel programming based logic circuit synthesizer
Genetic Parallel Programming (GPP) is a novel Genetic Programming paradigm. Based on the GPP paradigm and a local search operator - FlowMap, a logic circuit synthesizing system in...
Wai Shing Lau, Kin-Hong Lee, Kwong-Sak Leung
DATE
2010
IEEE
180views Hardware» more  DATE 2010»
14 years 22 days ago
Reliability- and process variation-aware placement for FPGAs
Abstract—Negative bias temperature instability (NBTI) significantly affects nanoscale integrated circuit performance and reliability. The degradation in threshold voltage (Vth) d...
Assem A. M. Bsoul, Naraig Manjikian, Li Shang
EH
2003
IEEE
136views Hardware» more  EH 2003»
14 years 28 days ago
Experimental Results in Evolutionary Fault-Recovery for Field Programmable
This paper presents experimental results of fast intrinsic evolutionary design and evolutionary fault recovery of a 4-bit Digital to Analog Converter (DAC) using the JPL stand-alo...
Ricardo Salem Zebulum, Didier Keymeulen, Vu Duong,...
GLVLSI
2002
IEEE
106views VLSI» more  GLVLSI 2002»
14 years 18 days ago
A low power direct digital frequency synthesizer with 60 dBc spectral purity
We present a low-power sine-output Direct Digital Frequency Synthesizer (DDFS) realized in 0.18 µm CMOS that achieves 60 dBc spectral purity from DC to the Nyquist frequency. No ...
J. M. Pierre Langlois, Dhamin Al-Khalili