122 search results - page 20 / 25 » User-controllable coherence for high performance shared memo... |
HPCA
2000
IEEE
13 years 11 months ago
2000
IEEE
With increasing chip densities, future microprocessor designs have the opportunity to integrate many of the traditional systemlevel modules onto the same chip as the processor. So...
ICS
2007
Tsinghua U.
14 years 26 days ago
2007
Tsinghua U.
Increased complexity of memory systems to ameliorate the gap between the speed of processors and memory has made it increasingly harder for compilers to optimize an arbitrary code...
HIPS
1997
IEEE
13 years 11 months ago
1997
IEEE
Several parallel programming languages, libraries and environments have been developed to ease the task of writing programs for multiprocessors. Proponents of each approach often ...
CODES
2007
IEEE
14 years 1 months ago
2007
IEEE
Memory requirements of intellectual property components (IP) in contemporary multi-processor systems-on-chip are increasing. Large high-speed external memories, such as DDR2 SDRAM...
HPCA
2008
IEEE
14 years 7 months ago
2008
IEEE
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...