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197
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DAC
2003
ACM
15 years 9 months ago
Instruction set compiled simulation: a technique for fast and flexible instruction set simulation
Instruction set simulators are critical tools for the exploration and validation of new programmable architectures. Due to increasing complexity of the architectures and timeto-ma...
Mehrdad Reshadi, Prabhat Mishra, Nikil D. Dutt
142
Voted
SIGCOMM
2010
ACM
15 years 3 months ago
Symbiotic routing in future data centers
Building distributed applications for data centers is hard. CamCube explores whether replacing the traditional switchbased network with a directly connected topology makes it easi...
Hussam Abu-Libdeh, Paolo Costa, Antony I. T. Rowst...
146
Voted
ISCA
2008
IEEE
201views Hardware» more  ISCA 2008»
15 years 3 months ago
iDEAL: Inter-router Dual-Function Energy and Area-Efficient Links for Network-on-Chip (NoC) Architectures
Network-on-Chip (NoC) architectures have been adopted by a growing number of multi-core designs as a flexible and scalable solution to the increasing wire delay constraints in the...
Avinash Karanth Kodi, Ashwini Sarathy, Ahmed Louri
135
Voted
SAC
2006
ACM
15 years 3 months ago
Privacy-preserving demographic filtering
The use of recommender systems in e-commerce to guide customer choices presents a privacy protection problem that is twofold. We seek to protect the privacy interests of customers...
Esma Aïmeur, Gilles Brassard, José Man...
112
Voted
IPPS
2010
IEEE
15 years 1 months ago
KRASH: Reproducible CPU load generation on many-core machines
Abstract--In this article we present KRASH, a tool for reproducible generation of system-level CPU load. This tool is intended for use in shared memory machines equipped with multi...
Swann Perarnau, Guillaume Huard