Sciweavers

18 search results - page 3 / 4
» Using Fuzzy Logic to Design Separation Function in Flocking ...
Sort
View
DATE
2000
IEEE
142views Hardware» more  DATE 2000»
13 years 12 months ago
Power and Delay Reduction via Simultaneous Logic and Placement Optimization in FPGAs
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
Balakrishna Kumthekar, Fabio Somenzi
ISCC
2003
IEEE
153views Communications» more  ISCC 2003»
14 years 21 days ago
Fuzzy Explicit Marking for Congestion Control in Differentiated Services Networks
This paper presents a new active queue management scheme, Fuzzy Explicit Marking (FEM), implemented within the differentiated services (Diff-Serv) framework to provide congestion ...
Chrysostomos Chrysostomou, Andreas Pitsillides, Ge...
DAC
2008
ACM
14 years 8 months ago
Bi-decomposing large Boolean functions via interpolation and satisfiability solving
Boolean function bi-decomposition is a fundamental operation in logic synthesis. A function f(X) is bi-decomposable under a variable partition XA, XB, XC on X if it can be written...
Ruei-Rung Lee, Jie-Hong Roland Jiang, Wei-Lun Hung
71
Voted
EH
1999
IEEE
351views Hardware» more  EH 1999»
13 years 11 months ago
Evolvable Hardware or Learning Hardware? Induction of State Machines from Temporal Logic Constraints
Here we advocate an approach to learning hardware based on induction of finite state machines from temporal logic constraints. The method involves training on examples, constraint...
Marek A. Perkowski, Alan Mishchenko, Anatoli N. Ch...
TACAS
2007
Springer
105views Algorithms» more  TACAS 2007»
14 years 1 months ago
Hoare Logic for Realistically Modelled Machine Code
This paper presents a mechanised Hoare-style programming logic framework for assembly level programs. The framework has been designed to fit on top of operational semantics of rea...
Magnus O. Myreen, Michael J. C. Gordon