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HIPEAC
2007
Springer
13 years 11 months ago
Customizing the Datapath and ISA of Soft VLIW Processors
In this paper, we examine the trade-offs in performance and area due to customizing the datapath and instruction set architecture of a soft VLIW processor implemented in a high-den...
Mazen A. R. Saghir, Mohamad El-Majzoub, Patrick Ak...
GECCO
2000
Springer
150views Optimization» more  GECCO 2000»
13 years 11 months ago
Automatic Synthesis of Electrical Circuits Containing a Free Variable Using Genetic Programming
A mathematical formula containing one or more free variables is "general" in the sense that it represents the solution to all instances of a problem (instead of just the...
John R. Koza, Martin A. Keane, Jessen Yu, William ...
VLSID
2009
IEEE
155views VLSI» more  VLSID 2009»
14 years 8 months ago
Unified Challenges in Nano-CMOS High-Level Synthesis
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
Saraju P. Mohanty
ISQED
2005
IEEE
81views Hardware» more  ISQED 2005»
14 years 1 months ago
An ILP Formulation for Reliability-Oriented High-Level Synthesis
Reliability decisions taken early in system design can bring significant benefits in terms of design quality. This paper presents a 0-1 integer linear programming (ILP) formulatio...
Suleyman Tosun, Ozcan Ozturk, Nazanin Mansouri, Er...
ISSS
1995
IEEE
121views Hardware» more  ISSS 1995»
13 years 11 months ago
A comprehensive estimation technique for high-level synthesis
We present an integrated approach aimed at predicting layout area needed to implement a behavioral description for a given performance goal. Our approach is novel because: (1) it ...
Seong Yong Ohm, Fadi J. Kurdahi, Nikil Dutt, Min X...