643 search results - page 54 / 129 » Using Hardware Counters to Automatically Improve Memory Perf... |
ICCAD
2002
IEEE
14 years 5 months ago
2002
IEEE
Application-specific instructions can significantly improve the performance, energy, and code size of configurable processors. A common approach used in the design of such instruc...
ICCD
2005
IEEE
14 years 5 months ago
2005
IEEE
Cache memories are commonly implemented through multiple memory banks to improve bandwidth and latency. The early knowledge of the data cache bank that an instruction will access ...
OSDI
1994
ACM
13 years 10 months ago
1994
ACM
This paper describes the design and evaluation of SAM, a shared object system for distributed memory machines. SAM is a portable run-time system that provides a global name space ...
SPAA
2009
ACM
14 years 9 months ago
2009
ACM
This workshop paper reports work in progress on NZTM, a nonblocking, zero-indirection object-based hybrid transactional memory system. NZTM can execute transactions using best-eff...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
System design methodology is poised to become the next big enabler for highly sophisticated electronic products. Design verification continues to be a major challenge and simulat...