643 search results - page 56 / 129 » Using Hardware Counters to Automatically Improve Memory Perf... |
CGO
2008
IEEE
14 years 3 months ago
2008
IEEE
Array inlining expands the concepts of object inlining to arrays. Groups of objects and arrays that reference each other are placed consecutively in memory so that their relative ...
ISCA
2009
IEEE
14 years 3 months ago
2009
IEEE
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
ICCAD
2008
IEEE
14 years 5 months ago
2008
IEEE
— Leveraging the power of scratchpad memories (SPMs) available in most embedded systems today is crucial to extract maximum performance from application programs. While regular a...
ASAP
2007
IEEE
14 years 3 months ago
2007
IEEE
Commodity accelerator technologies including reconfigurable devices provide an order of magnitude performance improvement compared to mainstream microprocessor systems. A number o...
ICCD
2006
IEEE
14 years 5 months ago
2006
IEEE
Abstract— Recent research has shown that forwarding speculative data to other processors before it is requested can improve the performance of multiprocessor systems. The most re...