162 search results - page 10 / 33 » Using Hardware Performance Monitors to Isolate Memory Bottle... |
ISCA
2007
IEEE
14 years 2 months ago
2007
IEEE
There has been considerable recent interest in the support of transactional memory (TM) in both hardware and software. We present an intermediate approach, in which hardware is us...
ISCA
2010
IEEE
14 years 1 months ago
2010
IEEE
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
VEE
2012
ACM
12 years 4 months ago
2012
ACM
As cloud-based computation becomes increasingly important, providing a general computational interface to support datacenterscale programming has become an imperative research age...
ISCA
2005
IEEE
14 years 2 months ago
2005
IEEE
To maintain coherence in conventional shared-memory multiprocessor systems, processors first check other processors’ caches before obtaining data from memory. This coherence che...
ERSA
2010
13 years 6 months ago
2010
Cache-based, general purpose CPUs perform at a small fraction of their maximum floating point performance when executing memory-intensive simulations, such as those required for sp...