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103
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MICRO
2003
IEEE
96views Hardware» more  MICRO 2003»
15 years 9 months ago
Using Interaction Costs for Microarchitectural Bottleneck Analysis
Attacking bottlenecks in modern processors is difficult because many microarchitectural events overlap with each other. This parallelism makes it difficult to both (a) assign a ...
Brian A. Fields, Rastislav Bodík, Mark D. H...
116
Voted
HICSS
2007
IEEE
132views Biometrics» more  HICSS 2007»
15 years 10 months ago
Modeling the Economic Cost of Transmission Bottlenecks
— The purpose of this paper is to model the stochastic behavior of nodal prices and use the predicted price differences between zones as the basis for measuring the magnitude and...
Timothy D. Mount, Jaeuk Ju
127
Voted
HPCA
2006
IEEE
16 years 4 months ago
Construction and use of linear regression models for processor performance analysis
Processor architects have a challenging task of evaluating a large design space consisting of several interacting parameters and optimizations. In order to assist architects in ma...
P. J. Joseph, Kapil Vaswani, Matthew J. Thazhuthav...
131
Voted
EGH
2004
Springer
15 years 9 months ago
A flexible simulation framework for graphics architectures
In this paper we describe a multipurpose tool for analysis of the performance characteristics of computer graphics hardware and software. We are developing Qsilver, a highly con...
Jeremy W. Sheaffer, David P. Luebke, Kevin Skadron
118
Voted
ICCD
2006
IEEE
115views Hardware» more  ICCD 2006»
16 years 18 days ago
Long-term Performance Bottleneck Analysis and Prediction
— Identifying performance bottlenecks is important for microarchitects and application developers to produce high performance microprocessor designs and application software. Man...
Fei Gao, Suleyman Sair