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» Using LOTOS Patterns to Characterize Architectural Styles
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ISLPED
2007
ACM
96views Hardware» more  ISLPED 2007»
13 years 9 months ago
Low-power process-variation tolerant arithmetic units using input-based elastic clocking
In this paper we propose a design methodology for low-power, high-performance, process-variation tolerant architecture for arithmetic units. The novelty of our approach lies in th...
Debabrata Mohapatra, Georgios Karakonstantis, Kaus...
FPGA
2009
ACM
233views FPGA» more  FPGA 2009»
14 years 2 months ago
FPCNA: a field programmable carbon nanotube array
Carbon nanotubes (CNTs), with their unique electronic properties, are promising materials for building nanoscale circuits. In this paper, we present a new CNT-based FPGA architect...
Chen Dong, Scott Chilstedt, Deming Chen
DEBS
2010
ACM
13 years 11 months ago
Evaluation of streaming aggregation on parallel hardware architectures
We present a case study parallelizing streaming aggregation on three different parallel hardware architectures. Aggregation is a performance-critical operation for data summarizat...
Scott Schneider, Henrique Andrade, Bugra Gedik, Ku...
DAC
2010
ACM
13 years 11 months ago
Efficient fault simulation on many-core processors
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...
Michael A. Kochte, Marcel Schaal, Hans-Joachim Wun...
ICIAR
2009
Springer
14 years 7 days ago
VizDraw: A Platform to Convert Online Hand-Drawn Graphics into Computer Graphics
Abstract. With the adoption of tablet-based data entry devices, there is considerable interest in methods for converting hand-drawn sketches of flow charts, graphs and block diagr...
Akshaya Kumar Mishra, Justin A. Eichel, Paul W. Fi...