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IJPP
2011
115views more  IJPP 2011»
12 years 11 months ago
Milepost GCC: Machine Learning Enabled Self-tuning Compiler
Tuning compiler optimizations for rapidly evolving hardware makes porting and extending an optimizing compiler for each new platform extremely challenging. Iterative optimization i...
Grigori Fursin, Yuriy Kashnikov, Abdul Wahid Memon...
IJCNN
2008
IEEE
14 years 2 months ago
A neural wake-sleep learning architecture for associating robotic facial emotions
—A novel wake-sleep learning architecture for processing a robot’s facial expressions is introduced. According to neuroscience evidence, associative learning of emotional respo...
Chi-Yung Yau, Kevin Burn, Stefan Wermter
IISWC
2008
IEEE
14 years 2 months ago
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
Clay Hughes, Tao Li
DAC
2010
ACM
13 years 8 months ago
RAMP gold: an FPGA-based architecture simulator for multiprocessors
We present RAMP Gold, an economical FPGA-based architecture simulator that allows rapid early design-space exploration of manycore systems. The RAMP Gold prototype is a high-throu...
Zhangxi Tan, Andrew Waterman, Rimas Avizienis, Yun...
ICALT
2005
IEEE
14 years 1 months ago
Understanding Object-Oriented Software through Virtual Role-Play
Visualization techniques are commonly used in computer science, particularly for understanding the interactions intrinsic in the object-oriented paradigm. The visualization effect...
Guillermo Jiménez-Díaz, Mercedes G&o...