With the recent design shift towards increasing the number of processing elements in a chip, high-bandwidth support in on-chip interconnect is essential for low-latency communicat...
This paper is a sequel of previous work, in which we have studied the traffic management problem in UMTS. The main objective was to improve the spectral efficiency of cellular netw...
Larissa Popova, Wolfgang H. Gerstacker, Wolfgang K...
with existing analysis tools. Modular reasoning principles such as abstraction, compositional refinement, and assume-guarantee reasoning are well understood for architectural hiera...
An integrated, hardware / software co-designed CISC processor is proposed and analyzed. The objectives are high performance and reduced complexity. Although the x86 ISA is targete...
Shiliang Hu, Ilhyun Kim, Mikko H. Lipasti, James E...
A common problem in event-triggered real-time systems is caused by low-priority tasks that are implemented as interrupt handlers interrupting and disturbing high-priority tasks th...
Fabian Scheler, Wanja Hofer, Benjamin Oechslein, R...